1. Technical Field
The present invention relates to processors in general, and in particular to register files within processors. Still more particularly, the present invention relates to a method for reducing leakage current within a register file of a processor.
2. Description of Related Art
In modern out-of-order processors, register renaming is fundamental requirement for eliminating data dependencies, such as write-after-write (WAW), write-after-read (WAR) and read-after-read (RAR) conflicts. Register renaming is achieved by introducing a set of additional auxiliary physical registers to increase the number of registers beyond the number of registers defined in the instruction set architecture of a processor. The architected state of the processor is guaranteed by means of an alias table. Efficient out-of-order implementations utilize a multiple rename register space to keep track of all data needed by instructions in flight. Since the register file contains instruction operands and result data, the register file must not be powered off, even during periods when the functional units of the processor are idle. State retention is needed until the data in the rename registers can be stored in a memory subsystem.
The register file, which typically covers a large area of a processor chip, is a critical source of leakage currents. The amount of passive leakage power can be reduced by powering off the entire register file or certain unused portions of the register file. The register file can be powered off during idle periods by, for example, storing all register contents to a memory subsystem. However, once the functional units are again active, all register data must be reloaded back from the memory subsystem to the register file by a series of load instructions. The series of load instructions required to reload all the stored register data from the subsystem introduce latency and active power issues that typically associated with load/store operations, which offsets the benefit from powering off the register file.
Consequently, it would be desirable to provide an improved method for reducing leakage current within a register file of a processor such that the power consumption of the processor can be reduced.